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DAC
1997
ACM
15 years 11 months ago
System Level Fixed-Point Design Based on an Interpolative Approach
The design process for xed-point implementations either in software or in hardware requires a bit-true speci cation of the algorithm in order to analyze quantization e ects on an...
Markus Willems, Volker Bürsgens, Holger Kedin...
DAC
1989
ACM
15 years 10 months ago
A New Approach to the Rectilinear Steiner Tree Problem
: We discuss a new approach to constructing the rectilinear Steiner tree (RST) of a given set of points in the plane, starting from a minimum spanning tree (MST). The main idea in ...
Jan-Ming Ho, Gopalakrishnan Vijayan, C. K. Wong
DAC
2007
ACM
15 years 10 months ago
Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies
This paper presents MOJITO, a system which optimizes across thousands of analog circuit topologies simultaneously, and returns a set of sized topologies that collectively provide ...
Trent McConaghy, Pieter Palmers, Georges G. E. Gie...
DATE
2004
IEEE
154views Hardware» more  DATE 2004»
15 years 10 months ago
MultiNoC: A Multiprocessing System Enabled by a Network on Chip
The MultiNoC system implements a programmable onchip multiprocessing platform built on top of an efficient, low area overhead intra-chip interconnection scheme. The employed inter...
Aline Mello, Leandro Möller, Ney Calazans, Fe...
DELTA
2004
IEEE
15 years 10 months ago
Scan Test of IP Cores in an ATE Environment
Manufacturing test of chips made of multiple IP cores requires different techniques if ATE is used. As scan chains are commonly used as access paths to the DUT, ATE architectures ...
Luca Schiano, Yong-Bin Kim, Fabrizio Lombardi