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166
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RTSS
2000
IEEE
15 years 11 months ago
2000
IEEE
The maturity of schedulabilty analysis techniquesfor fired-prioritypreemptive scheduling has enabled the consideration of timing issues at design time using a specification of the...
167
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IPPS
1998
IEEE
15 years 11 months ago
1998
IEEE
In distributed-memory message-passing architectures reducing communication cost is extremely important. In this paper, we present a technique to optimize communication globally. O...
193
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VTS
1998
IEEE
15 years 11 months ago
1998
IEEE
This paper presents a BIST architecture for Finite State Machines that exploits Cellular Automata (CA) as pattern generators and signature analyzers. The main advantage of the pro...
201
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DAC
1997
ACM
15 years 11 months ago
1997
ACM
We present a system-level approach for power optimization under a set of user specified costs and timing constraints of hard real-time designs. The approach optimizes all three d...
142
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ICCAD
1996
IEEE
15 years 11 months ago
1996
IEEE
Abstract -- Current day behavioral-synthesis techniques produce architectures that are power-inefficient in the interconnect. Experiments have demonstrated that in synthesized desi...