ct This paper provides an overview of the WarpIV Simulation Kernel that was designed to be an initial implementation of the Standard Simulation Architecture (SSA). WarpIV is the ne...
We explore runtime mechanisms and policies for scheduling dynamic multi-grain parallelism on heterogeneous multi-core processors. Heterogeneous multi-core processors integrate con...
Filip Blagojevic, Dimitrios S. Nikolopoulos, Alexa...
We describe an imaging architecture for compressive video sensing termed programmable pixel compressive camera (P2C2). P2C2 allows us to capture fast phenomena at frame rates high...
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
We investigate to what extent `bag of visual words' models can be used to distinguish categories which have significant visual similarity. To this end we develop and optimize...