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ICIP
1994
IEEE
16 years 8 months ago
Full Custom VLSI Implementation of High-Speed 2-D DCT/IDCT Chip
In this paper we present a full-custom VLSI design of highspeed 2-D DCT/IDCT processor based on the new class of time-recursive algorithms and architectures which has never been i...
Vishnu Srinivasan, K. J. Ray Liu
DAC
2008
ACM
16 years 7 months ago
Enhancing timing-driven FPGA placement for pipelined netlists
FPGA application developers often attempt to use pipelining, Cslowing and retiming to improve the performance of their designs. Unfortunately, such registered netlists present a f...
Kenneth Eguro, Scott Hauck
DAC
2008
ACM
16 years 7 months ago
Merging nodes under sequential observability
This paper presents a new type of sequential technology independent synthesis. Building on the previous notions of combinational observability and sequential equivalence, sequenti...
Michael L. Case, Victor N. Kravets, Alan Mishchenk...
DAC
2007
ACM
16 years 7 months ago
Parameterized Macromodeling for Analog System-Level Design Exploration
In this paper we propose a novel parameterized macromodeling technique for analog circuits. Unlike traditional macromodels that are only extracted for a small variation space, our...
Jian Wang, Xin Li, Lawrence T. Pileggi
DAC
2007
ACM
16 years 7 months ago
Computationally Efficient Power Integrity Simulation for System-on-Package Applications
Power integrity simulation for system-on-package (SoP) based modules is a crucial bottleneck in the SoP design flow. In this paper, the multi-layer finite difference method (M-FDM...
Krishna Bharath, Ege Engin, Madhavan Swaminathan, ...