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ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
16 years 7 days ago
Register binding and port assignment for multiplexer optimization
- Data path connection elements, such as multiplexers, consume a significant amount of area on a VLSI chip, especially for FPGA designs. Multiplexer optimization is a difficult pro...
Deming Chen, Jason Cong
ISLPED
2004
ACM
169views Hardware» more  ISLPED 2004»
16 years 7 days ago
Delay optimal low-power circuit clustering for FPGAs with dual supply voltages
This paper presents a delay optimal FPGA clustering algorithm targeting low power. We assume that the configurable logic blocks of the FPGA can be programmed using either a high s...
Deming Chen, Jason Cong
MICAI
2004
Springer
16 years 5 days ago
A Biologically Motivated and Computationally Efficient Natural Language Processor
Abstract. Conventional artificial neural network models lack many physiological properties of the neuron. Current learning algorithms are more concerned to computational performanc...
João Luís Garcia Rosa
NOSSDAV
2004
Springer
16 years 5 days ago
Distributed server replication in large scale networks
Quality of service for high-bandwidth or delay-sensitive applications in the Internet, such as streaming media and online games, can be significantly improved by replicating serv...
Bong-Jun Ko, Dan Rubenstein
FPL
2003
Springer
100views Hardware» more  FPL 2003»
16 years 23 hour ago
Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
Nazar A. Saqib, Francisco Rodríguez-Henr&ia...