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ASAP
2007
IEEE
95views Hardware» more  ASAP 2007»
16 years 1 months ago
Performance Evaluation of Probe-Send Fault-tolerant Network-on-chip Router
With increasing reliability concerns for current and next generation VLSI technologies, fault-tolerance is fast becoming an integral part of system-on-chip and multicore architect...
Sumit D. Mediratta, Jeffrey T. Draper
COMSWARE
2007
IEEE
16 years 1 months ago
A Parallelization of ECDSA Resistant to Simple Power Analysis Attacks
The Elliptic Curve Digital Signature Algorithm admits a natural parallelization wherein the point multiplication step can be split in two parts and executed in parallel. Further pa...
Sarang Aravamuthan, Viswanatha Rao Thumparthy
GECCO
2007
Springer
207views Optimization» more  GECCO 2007»
16 years 26 days ago
A data parallel approach to genetic programming using programmable graphics hardware
In recent years the computing power of graphics cards has increased significantly. Indeed, the growth in the computing power of these graphics cards is now several orders of magn...
Darren M. Chitty
GLOBECOM
2006
IEEE
16 years 23 days ago
Logical Topology Design and Interface Assignment for Multi-Channel Wireless Mesh Networks
Abstract— A multi-channel wireless mesh network (MCWMN) consists of a number of stationary wireless routers, where each router is equipped with multiple network interface cards (...
Amir Hamed Mohsenian Rad, Vincent W. S. Wong
CF
2006
ACM
16 years 21 days ago
A nano-scale reconfigurable mesh with spin waves
In this paper, we present a nano-scale reconfigurable mesh that is interconnected with ferromagnetic spin-wave buses. The architecture described here, while requiring the same num...
Mary Mehrnoosh Eshaghian-Wilner, Alexander Khitun,...