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AHS
2006
IEEE
95views Hardware» more  AHS 2006»
15 years 10 months ago
A Modular Framework for the Evolution of Circuits on Configurable Transistor Array Architectures
This paper gives an overview over the progress that has been made by the Heidelberg FPTA group within the field of analog evolvable hardware. Achievements are the design of a CMOS...
Martin Trefzer, Jörg Langeheine, Karlheinz Me...
DRM
2006
Springer
15 years 10 months ago
Towards a secure and interoperable DRM architecture
In this paper we look at the problem of interoperability of digital rights management (DRM) systems in home networks. We introduce an intermediate module called the Domain Interop...
Gelareh Taban, Alvaro A. Cárdenas, Virgil D...
IJNSEC
2007
137views more  IJNSEC 2007»
15 years 6 months ago
An FPGA-based AES-CCM Crypto Core For IEEE 802.11i Architecture
The widespread adoption of IEEE 802.11 wireless networks has brought its security paradigm under active research. One of the important research areas in this field is the realiza...
Arshad Aziz, Nassar Ikram
IPPS
1998
IEEE
15 years 11 months ago
SIMD and Mixed-Mode Implementations of a Visual Tracking Algorithm
This paper describes the implementation of a featurebased visual tracking algorithm on a SIMD MasPar MP-1 and the mixed-mode PASM prototype. The sequential algorithm is introduced...
Mark Bernd Kulaczewski, Howard Jay Siegel
ASAP
2004
IEEE
123views Hardware» more  ASAP 2004»
15 years 10 months ago
A Packet Scheduling Algorithm for IPSec Multi-Accelerator Based Systems
IPSec is a suite of protocols that adds security to communications at the IP level. Protocols within the IPSec suite make extensive use of cryptographic algorithms. Since these al...
Fabien Castanier, Alberto Ferrante, Vincenzo Piuri