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DAC
2004
ACM
16 years 3 days ago
Fast and accurate parasitic capacitance models for layout-aware
Considering layout effects early in the analog design process is becoming increasingly important. We propose techniques for estimating parasitic capacitances based on look-up tabl...
Anuradha Agarwal, Hemanth Sampath, Veena Yelamanch...
DAC
2004
ACM
16 years 3 days ago
A timing-driven module-based chip design flow
A Module-Rased design flow for digital ICs with hard and sofl modules is presented. Versions of the sofl modules are implemented with different areddelay characteristics. The vers...
Fan Mo, Robert K. Brayton
DAC
2004
ACM
16 years 3 days ago
A new state assignment technique for testing and low power
In order to improve the testabilities and power consumption, a new state assignment technique based on m-block partition is introduced in this paper. The length and number of feed...
Sungju Park, Sangwook Cho, Seiyang Yang, Maciej J....
NETGAMES
2004
ACM
16 years 3 days ago
Scalable peer-to-peer networked virtual environment
We propose a fully-distributed peer-to-peer architecture to solve the scalability problem of Networked Virtual Environment in a simple and efficient manner. Our method exploits lo...
Shun-Yun Hu, Guan-Ming Liao
PPSN
2004
Springer
16 years 1 days ago
Evolving Genetic Regulatory Networks for Hardware Fault Tolerance
We present a new approach that is able to produce an increased fault tolerance in bio-inspired electronic circuits. To this end, we designed hardwarefriendly genetic regulatory net...
Arne Koopman, Daniel Roggen