Conventional microarchitectures choose a single memory hierarchy design point targeted at the average application. In this paper, we propose a cache and TLB layout and design that...
Rajeev Balasubramonian, David H. Albonesi, Alper B...
This paper presents an OMNeT-based Framework to simulate large complex storage networks, with its corresponding underlying subsystems (I/O, Networking, etc.). With this Framework,...
In machine translation (MT) dierent levels of representation can be used to translate a source language sentence onto its target language equivalent. These levels have to be relat...
Abstract--In this paper, we describe the design for a co-processor for whole-genome phylogenetic reconstruction. Our current design performs a parallelized breakpoint median comput...
This paper presents the Architecture Tradeoff Analysis Method (ATAM), a structured technique for understanding the tradeoffs inherent in design. This method was developed to provi...
Rick Kazman, Mark H. Klein, Mario Barbacci, Thomas...