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DAC
2005
ACM
16 years 7 months ago
A new canonical form for fast boolean matching in logic synthesis and verification
? An efficient and compact canonical form is proposed for the Boolean matching problem under permutation and complementation of variables. In addition an efficient algorithm for co...
Afshin Abdollahi, Massoud Pedram
ISBI
2004
IEEE
16 years 7 months ago
Multi-Modal Non-Rigid Registration Using a Stochastic Gradient Approximation
We present a new fast implementation of a non-rigid registration algorithm, based on a finite element elastic deformation model using the mutual information metric with a linear e...
Aloys du Bois d'Aische, Benoît Macq, Florian...
VLSID
2005
IEEE
98views VLSI» more  VLSID 2005»
16 years 7 months ago
False Path and Clock Scheduling Based Yield-Aware Gate Sizing
Timing margin (slack) needs to be carefully managed to ensure a satisfactory timing yield. We propose a new design flow that combines a false-path-aware gate sizing and a statisti...
Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Pin...
DATE
2007
IEEE
105views Hardware» more  DATE 2007»
16 years 1 months ago
Scratchpad memories vs locked caches in hard real-time systems: a quantitative comparison
We propose in this paper an algorithm for off-line selection of the contents of on-chip memories. The algorithm supports two types of on-chip memories, namely locked caches and sc...
Isabelle Puaut, Christophe Pais
DATE
2005
IEEE
192views Hardware» more  DATE 2005»
16 years 8 days ago
C Based Hardware Design for Wireless Applications
The algorithms used in wireless applications are increasingly more sophisticated and consequently more challenging to implement in hardware. Traditional design flows require devel...
Andrés Takach, Bryan Bowyer, Thomas Bollaer...