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DAC
1995
ACM
15 years 10 months ago
Automatic Layout Synthesis of Leaf Cells
––This paper describes algorithms for automatic layout synthesisofleafcellsin1–dandinanew1–1/2–dlayoutstyle,useful for non–dual circuit styles. The graph theory based a...
Sanjay Rekhi, J. Donald Trotter, Daniel H. Linder
CDES
2006
136views Hardware» more  CDES 2006»
15 years 8 months ago
Using Task Recomputation During Application Mapping in Parallel Embedded Architectures
- Many memory-sensitive embedded applications can tolerate small performance degradations if doing so can reduce the memory space requirements significantly. This paper explores th...
Suleyman Tosun, Mahmut T. Kandemir, Hakduran Koc
DAC
2007
ACM
16 years 7 months ago
Period Optimization for Hard Real-time Distributed Automotive Systems
The complexity and physical distribution of modern active-safety automotive applications requires the use of distributed architectures. These architectures consist of multiple ele...
Abhijit Davare, Qi Zhu, Marco Di Natale, Claudio P...
VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
16 years 7 months ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne
HPCA
2002
IEEE
16 years 7 months ago
Quantifying Load Stream Behavior
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
Suleyman Sair, Timothy Sherwood, Brad Calder