4809 search results - page 222 / 962 » CajunBot: Architecture and algorithms |
177
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IEEEPACT
2002
IEEE
15 years 11 months ago
2002
IEEE
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
172
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ICASSP
2011
IEEE
14 years 10 months ago
2011
IEEE
To address the increasing demand for higher resolution and frame rates, processing speed (i.e. performance) and area cost need to be considered in the development of next generati...
204
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CIDR
2011
14 years 10 months ago
2011
Hyder supports reads and writes on indexed records within classical multi-step transactions. It is designed to run on a cluster of servers that have shared access to a large pool ...
152
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ICASSP
2009
IEEE
16 years 1 months ago
2009
IEEE
A split quaternion learning algorithm for the training of nonlinear finite impulse response filters for the modelling of hypercomplex signals is proposed. A rigorous derivation ...
136
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ISCAS
2006
IEEE
16 years 18 days ago
2006
IEEE
— In this paper an architecture, signal reconstruction algorithm and first-ever implementation of an asynchronous delta-sigma converter are presented. The signal reconstruction ...