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MASCOTS
2008
15 years 8 months ago
On the Stability of Best Effort Flow Control Mechanisms in On-Chip Architectures
In this paper we present a centralized flow control scheme in NoCs in the presence of both elastic and streaming flow traffic paradigms. We model the desired Best Effort (BE) sour...
Mohammad Sadegh Talebi, Ahmad Khonsari
INTEGRATION
2007
98views more  INTEGRATION 2007»
15 years 6 months ago
Hashchip: A shared-resource multi-hash function processor architecture on FPGA
The ubiquitous presence of mobile devices and the demand for better performance and efficiency have motivated research into embedded implementations of cryptography algorithms. I...
T. S. Ganesh, Michael T. Frederick, T. S. B. Sudar...
DAC
1989
ACM
15 years 10 months ago
Scheduling and Binding Algorithms for High-Level Synthesis
- New algorithms for high-level synthesis are presented. The first performs scheduling under hardware resource constraints and improves on commonly used list scheduling techniques ...
Pierre G. Paulin, John P. Knight
TOMS
2008
120views more  TOMS 2008»
15 years 6 months ago
Families of algorithms related to the inversion of a Symmetric Positive Definite matrix
We present families of algorithms for operations related to the computation of the inverse of a Symmetric Positive Definite (SPD) matrix: Cholesky factorization, inversion of a tr...
Paolo Bientinesi, Brian C. Gunter, Robert A. van d...
SPIN
2004
Springer
15 years 12 months ago
Explicit State Model Checking with Hopper
The Murϕ-based Hopper tool is a general purpose explicit model checker. Hopper leverages Murϕ’s class structure to implement new algorithms. Hopper differs from Murϕ in that i...
Michael Jones, Eric Mercer