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ASAP
2008
IEEE
186views Hardware» more  ASAP 2008»
16 years 1 months ago
Accelerating Nussinov RNA secondary structure prediction with systolic arrays on FPGAs
RNA structure prediction, or folding, is a computeintensive task that lies at the core of several search applications in bioinformatics. We begin to address the need for high-thro...
Arpith C. Jacob, Jeremy Buhler, Roger D. Chamberla...
INFOCOM
2006
IEEE
16 years 17 days ago
Control Plane for Advance Bandwidth Scheduling in Ultra High-Speed Networks
— A control-plane architecture for supporting advance reservation of dedicated bandwidth channels on a switched network infrastructure is described including the front-end web in...
Nageswara S. V. Rao, Qishi Wu, Song Ding, Steven M...
ICITA
2005
IEEE
16 years 4 days ago
On Dynamic Routing and Wavelength Assignment in Multi-granular All-Optical Networks
In this paper, we investigate the dynamic RWA problem in networks comprising of all-optical switches based on the multi-granular architecture (MG_DRWA). With this adaptive archite...
Ching-Fang Hsu, Te-Lung Liu, Fang-Sheng Lin
ICDAR
2003
IEEE
15 years 12 months ago
Optimizing the Number of States, Training Iterations and Gaussians in an HMM-based Handwritten Word Recognizer
In off-line handwriting recognition, classifiers based on hidden Markov models (HMMs) have become very popular. However, while there exist well-established training algorithms, s...
Simon Günter, Horst Bunke
DAC
1999
ACM
15 years 11 months ago
Buffer Insertion with Accurate Gate and Interconnect Delay Computation
Buffer insertion has become a critical step in deep submicron design, and several buffer insertion/sizing algorithms have been proposed in the literature. However, most of these m...
Charles J. Alpert, Anirudh Devgan, Stephen T. Quay