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ISPD
2003
ACM
73views Hardware» more  ISPD 2003»
15 years 11 months ago
Research directions for coevolution of rules and routers
Design rules in advanced IC manufacturing processes are increasingly problematic for modern router architectures and algorithms. This paper first reviews types and causes of “d...
Andrew B. Kahng
TACAS
2001
Springer
160views Algorithms» more  TACAS 2001»
15 years 11 months ago
Hardware/Software Co-Design Using Functional Languages
In previous work we have developed and prototyped a silicon compiler which translates a functional language (SAFL) into hardware. Here we present a SAFL-level program transformati...
Alan Mycroft, Richard Sharp
DAC
2000
ACM
15 years 11 months ago
CYCLONE: automated design and layout of RF LC-oscillators
This paper presents an automated, layout-aware RF LCoscillator design tool, called CYCLONE that delivers an accurate and optimal LC-oscillator design, from specification to layout...
Carl De Ranter, B. De Muer, Geert Van der Plas, Pe...
ASAP
2009
IEEE
98views Hardware» more  ASAP 2009»
15 years 4 months ago
A Power-Scalable Switch-Based Multi-processor FFT
This paper examines the architecture, algorithm and implementation of a switch-based multi-processor realization of the fast Fourier transform (FFT). The architecture employs M pr...
Bassam Jamil Mohd, Earl E. Swartzlander Jr.
VLSID
1997
IEEE
106views VLSI» more  VLSID 1997»
15 years 10 months ago
Low-Power Configurable Processor Array for DLMS Adaptive Filtering
I n this paper, we first present a pipelined delayed least mean square (DLMS) adaptive filter architecture whose power dissipation meets a specified budget. This low-power archite...
S. Ramanathan, V. Visvanathan