4809 search results - page 179 / 962 » CajunBot: Architecture and algorithms |
178
click to vote
DAC
2007
ACM
16 years 7 months ago
2007
ACM
Abstract-- In nanometer-scale VLSI technologies, several interconnect issues like routing congestion and interconnect delay have become the main concerns in placement. However, all...
162
click to vote
DAC
2006
ACM
16 years 7 months ago
2006
ACM
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techn...
178
click to vote
MOBIHOC
2008
ACM
16 years 6 months ago
2008
ACM
Recent research shows that significant energy saving can be achieved in wireless sensor networks with a mobile base station that collects data from sensor nodes via short-range co...
155
click to vote
ICCAD
2004
IEEE
16 years 3 months ago
2004
IEEE
In this paper we study the technology mapping problem for FPGA architectures to minimize chip area, or the total number of lookup tables (LUTs) of the mapped design, under the chi...
180
click to vote
IWMM
2009
Springer
16 years 1 months ago
2009
Springer
Tracing algorithms visit reachable nodes in a graph and are central to activities such as garbage collection, marshalling etc. Traditional sequential algorithms use a worklist, re...