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ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
16 years 1 days ago
A technique for low energy mapping and routing in network-on-chip architectures
Network-on-chip (NoC) has been proposed as a solution for the global communication challenges of System-on-chip (SoC) design in the nanoscale technologies. NoC design with mesh ba...
Krishnan Srinivasan, Karam S. Chatha
ECMDAFA
2005
Springer
236views Hardware» more  ECMDAFA 2005»
16 years 1 hour ago
Model-Driven Architecture for Hard Real-Time Systems: From Platform Independent Models to Code
The model-driven software development for hard real-time systems promotes the usage of the platform independent model as major design artifact. It is used to develop the software l...
Sven Burmester, Holger Giese, Wilhelm Schäfer
COMPUTER
2002
79views more  COMPUTER 2002»
15 years 6 months ago
A Practical Architecture for Reliable Quantum Computers
wever, by using a simple model of abstract building blocks: quantum bits, gates, and algorithms, and the available implementation technologies--in all their imperfections.7 The bas...
Mark Oskin, Frederic T. Chong, Isaac L. Chuang
HIPC
2009
Springer
15 years 4 months ago
Fast checkpointing by Write Aggregation with Dynamic Buffer and Interleaving on multicore architecture
Large scale compute clusters continue to grow to ever-increasing proportions. However, as clusters and applications continue to grow, the Mean Time Between Failures (MTBF) has redu...
Xiangyong Ouyang, Karthik Gopalakrishnan, Tejus Ga...
DAC
2005
ACM
16 years 7 months ago
A low latency router supporting adaptivity for on-chip interconnects
The increased deployment of System-on-Chip designs has drawn attention to the limitations of on-chip interconnects. As a potential solution to these limitations, Networks-on -Chip...
Jongman Kim, Dongkook Park, Theo Theocharides, Nar...