267 search results - page 39 / 54 » CHIPS: Custom Hardware Instruction Processor Synthesis |
137
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GLVLSI
2007
IEEE
16 years 9 days ago
2007
IEEE
LNS (logarithmic number system) arithmetic has the advantages of high-precision and high performance in complex function computation. However, the large hardware problem in LNS ad...
183
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ISVLSI
2002
IEEE
15 years 11 months ago
2002
IEEE
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
164
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ICS
2001
Tsinghua U.
15 years 10 months ago
2001
Tsinghua U.
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
142
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FPL
2007
Springer
16 years 4 days ago
2007
Springer
In this paper, we present a shared instruction and data memory controller for the On-Chip Memory (OCM) bus of the PowerPC embedded in the Virtex-4 chip. The traditional design of ...
164
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ICASSP
2009
IEEE
15 years 3 months ago
2009
IEEE
We have developed a VLSI chip for 5,000 word speakerindependent continuous speech recognition. This chip employs a context-dependent HMM (hidden Markov model) based speech recogni...