267 search results - page 31 / 54 » CHIPS: Custom Hardware Instruction Processor Synthesis |
165
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DATE
2002
IEEE
15 years 11 months ago
2002
IEEE
In this paper, we investigate the benefits of a flexible, application-specific instruction set by adding a run-time Reconfigurable Functional Unit (RFU) to a VLIW processor. Preli...
179
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ISCA
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper introduces the idea of using a User-Level Memory Thread (ULMT) for correlation prefetching. In this approach, a user thread runs on a general-purpose processor in main ...
153
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ISSS
2002
IEEE
15 years 11 months ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
176
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CODES
2009
IEEE
15 years 10 months ago
2009
IEEE
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a softwarelike ...
165
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ASAP
2005
IEEE
15 years 11 months ago
2005
IEEE
On public communication networks such as the Internet, data confidentiality can be provided by symmetric-key ciphers. One of the most common operations used in symmetric-key ciphe...