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DATE
2005
IEEE
128views Hardware» more  DATE 2005»
16 years 29 days ago
Design of a Virtual Component Neutral Network-on-Chip Transaction Layer
Research studies have demonstrated the feasibility and advantages of Network-on-Chip (NoC) over traditional bus-based architectures but have not focused on compatibility communica...
Philippe Martin
ISAAC
2005
Springer
78views Algorithms» more  ISAAC 2005»
16 years 25 days ago
Upper Bounds on the Computational Power of an Optical Model of Computation
We present upper bounds on the computational power of an optical model of computation called the C2-CSM. We show that C2-CSM time is no more powerful than sequential space, thus gi...
Damien Woods
UC
2005
Springer
16 years 24 days ago
Lower Bounds on the Computational Power of an Optical Model of Computation
We present lower bounds on the computational power of an optical model of computation called the C2-CSM. We show that C2-CSM time is at least as powerful as sequential space, thus ...
Damien Woods, J. Paul Gibson
GECCO
2003
Springer
111views Optimization» more  GECCO 2003»
16 years 16 days ago
An Adaptive Penalty Scheme for Steady-State Genetic Algorithms
A parameter-less adaptive penalty scheme for steady-state genetic algorithms applied to constrained optimization problems is proposed. For each constraint, a penalty parameter is a...
Helio J. C. Barbosa, Afonso C. C. Lemonge
ICCD
1999
IEEE
91views Hardware» more  ICCD 1999»
15 years 11 months ago
Architectural Synthesis of Timed Asynchronous Systems
ions", in IEEE Transactions on CAD of VLSI, 25(3):403-412, March, 2006. , E. Mercer, C. Myers, "Modular Verification of Timed Systems Using Automatic Abstraction" in...
Brandon M. Bachman, Hao Zheng, Chris J. Myers