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ICCD
2004
IEEE
122views Hardware» more  ICCD 2004»
16 years 4 months ago
Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures
Network-on-chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity fo...
Krishnan Srinivasan, Karam S. Chatha, Goran Konjev...
CSL
2007
Springer
16 years 1 months ago
The Power of Counting Logics on Restricted Classes of Finite Structures
Abstract. Although Cai, F¨urer and Immerman have shown that fixedpoint logic with counting (IFP + C) does not express all polynomialtime properties of finite structures, there h...
Anuj Dawar, David Richerby
191
Voted
SAMOS
2007
Springer
16 years 1 months ago
Communication Architecture Simulation on the Virtual Synchronization Framework
As multi-processor system-on-chip (MPSoC) has become an effective solution to ever-increasing design complexity of modern embedded systems, fast and accurate HW/SW cosimulation of...
Taewook Oh, Youngmin Yi, Soonhoi Ha
DATE
2006
IEEE
109views Hardware» more  DATE 2006»
16 years 1 months ago
A methodology for mapping multiple use-cases onto networks on chips
A communication-centric design approach, Networks on Chips (NoCs), has emerged as the design paradigm for designing a scalable communication infrastructure for future Systems on C...
Srinivasan Murali, Martijn Coenen, Andrei Radulesc...
183
Voted
ETS
2006
IEEE
108views Hardware» more  ETS 2006»
16 years 1 months ago
A DFT Architecture for Asynchronous Networks-on-Chip
The Networks-on-Chip (NoCs) paradigm is emerging as a solution for the communication of SoCs. Many NoC architecture propositions are presented but few works on testing these netwo...
Xuan-Tu Tran, Jean Durupt, François Bertran...