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    APCCAS
    2006
    IEEE
    307views Hardware» more  APCCAS 2006»
    A Fast-Lock-In ADPLL with High-Resolution and Low-Power DCO for SoC Applications
    16 years 16 days ago
    A Fast-Lock-In ADPLL with High-Resolution and Low-Power DCO for SoC Applications
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    Duo Sheng, Ching-Che Chung, Chen-Yi Lee
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    ASYNC
    2006
    IEEE
    112views Hardware» more  ASYNC 2006»
    Design of On-chip and Off-chip Interfaces for a GALS NoC Architecture
    16 years 16 days ago
    Design of On-chip and Off-chip Interfaces for a GALS NoC Architecture
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    Edith Beigné, Pascal Vivet
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    DATE
    2006
    IEEE
    115views Hardware» more  DATE 2006»
    Application specific NoC design
    16 years 16 days ago
    Application specific NoC design
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    Luca Benini
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    DATE
    2006
    IEEE
    134views Hardware» more  DATE 2006»
    Power constrained and defect-probability driven SoC test scheduling with test set partitioning
    16 years 15 days ago
    Power constrained and defect-probability driven SoC test scheduling with test set partitioning
    Download  www.ida.liu.se
    1 This paper presents a test scheduling approach for system-onchip production tests with peak-power constraints. An abort-onfirst-fail test approach is assumed, whereby the test is...
    Zhiyuan He, Zebo Peng, Petru Eles
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    DATE
    2006
    IEEE
    116views Hardware» more  DATE 2006»
    SoC: fuelling the hopes of the mobile industry
    16 years 15 days ago
    SoC: fuelling the hopes of the mobile industry
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    Uwe Lambrette, Booz Allen Hamilton
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