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VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
16 years 7 days ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
ECBS
2000
IEEE
87views Hardware» more  ECBS 2000»
15 years 10 months ago
Limited Software Warranties
Because there are di erent types of software (e.g., language, application, target environment, etc.), di erent software certi cation methodologies are needed. Software process imp...
Jeffrey M. Voas
AAAI
2006
15 years 7 months ago
The Robot Intelligence Kernel
The Robot Intelligence Kernel (RIK) is a portable, reconfigurable suite of perceptual, behavioral, and cognitive capabilities that can be used across many different platforms, env...
David J. Bruemmer, Douglas A. Few, Miles C. Walton...
SIGMETRICS
2010
ACM
217views Hardware» more  SIGMETRICS 2010»
15 years 6 months ago
Optimal recovery of single disk failure in RDP code storage systems
Modern storage systems use thousands of inexpensive disks to meet the storage requirement of applications. To enhance the data availability, some form of redundancy is used. For e...
Liping Xiang, Yinlong Xu, John C. S. Lui, Qian Cha...
CODES
2004
IEEE
15 years 10 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan