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» C Based Hardware Design for Wireless Applications
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ISQED
2009
IEEE
187views Hardware» more  ISQED 2009»
16 years 1 months ago
An efficient current-based logic cell model for crosstalk delay analysis
 Electrical Modeling for High Bandwidth IO Link  Chirayu Amin, Chandramouli Kashyap ¬ Intel Corp., Hillsboro, OR  Prateek Bhansali ¬ Univ. of Minnesota, Mi...
Debasish Das, William Scott, Shahin Nazarian, Hai ...
ISCA
2007
IEEE
110views Hardware» more  ISCA 2007»
16 years 21 days ago
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities an...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
EURODAC
1995
IEEE
101views VHDL» more  EURODAC 1995»
15 years 10 months ago
Exploiting power-up delay for sequential optimization
Recent work has identified the notion of safe replacement for sequential synchronousdesigns that may not have reset hardware or even explicitly known initial states. Safe replace...
Vigyan Singhal, Carl Pixley, Adnan Aziz, Robert K....
CCS
2009
ACM
16 years 1 months ago
A new cell counter based attack against tor
Various low-latency anonymous communication systems such as Tor and Anoymizer have been designed to provide anonymity service for users. In order to hide the communication of user...
Zhen Ling, Junzhou Luo, Wei Yu, Xinwen Fu, Dong Xu...
PODC
2009
ACM
16 years 7 months ago
Partial synchrony based on set timeliness
d Abstract] Marcos K. Aguilera Microsoft Research Silicon Valley Mountain View, CA, USA Carole Delporte-Gallet Universit? Paris 7 Paris, France Hugues Fauconnier Universit? Paris ...
Marcos Kawazoe Aguilera, Carole Delporte-Gallet, H...