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DATE
2011
IEEE
235views Hardware» more  DATE 2011»
14 years 10 months ago
An Overview of Approaches Towards the Timing Analysability of Parallel Architecture
In order to meet performance/low energy/integration requirements, parallel architectures (multithreaded cores and multi-cores) are more and more considered in the design of embedd...
Christine Rochange
TCSV
2010
15 years 1 months ago
High Performance Stereo Vision Designed for Massively Data Parallel Platforms
Abstract--Real-time stereo vision is attractive in many applications like robot navigation and 3D scene reconstruction. Data parallel platforms, e.g. GPU, is often used for real-ti...
Wei Yu, Tsuhan Chen, Franz Franchetti, James C. Ho...
OTM
2009
Springer
16 years 1 months ago
A Component Assignment Framework for Improved Capacity and Assured Performance in Web Portals
Abstract. Web portals hosting large-scale internet applications have become popular due to the variety of services they provide to their users. These portals are developed using co...
Nilabja Roy, Yuan Xue, Aniruddha S. Gokhale, Larry...
APCCAS
2006
IEEE
373views Hardware» more  APCCAS 2006»
15 years 10 months ago
A New High Precision Low Offset Dynamic Comparator for High Resolution High Speed ADCs
A new low offset dynamic comparator for high resolution high speed analog-to-digital application has been designed. Inputs are reconfigured from the typical differential pair compa...
Vipul Katyal, Randall L. Geiger, Degang Chen
ICCAD
2001
IEEE
127views Hardware» more  ICCAD 2001»
16 years 3 months ago
What is the Limit of Energy Saving by Dynamic Voltage Scaling?
Dynamic voltage scaling (DVS) is a technique that varies the supply voltage and clock frequency based on the computation load to provide desired performance with the minimal amoun...
Gang Qu