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CSREAESA
2006
15 years 8 months ago
A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications
- This paper presents a dual-core embedded System-on-Chip for a wide range of application fields with particularly high processing demands, including general signal processing, vid...
Hong Yue, Kui Dai, Zhiying Wang
NETGAMES
2003
ACM
15 years 12 months ago
Mobility and stability evaluation in wireless multi-hop networks using multi-player games
Plenty of work was contributed in the field of protocol design and performance evaluation of multi-hop networks. It is generally accepted that mobility has a huge impact on the p...
Frank H. P. Fitzek, Leonardo Badia, Michele Zorzi,...
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CODES
2006
IEEE
16 years 22 days ago
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
Martijn Coenen, Srinivasan Murali, Andrei Radulesc...
EUROMICRO
2009
IEEE
16 years 1 months ago
Foundations for a Model-Driven Integration of Business Services in a Safety-Critical Application Domain
—Current architectures for systems integration provide means for forming agile business processes by manually or dynamically configuring the components. However, a major challeng...
Richard Mordinyi, Thomas Moser, eva Kühn, Ste...
ISCAS
2003
IEEE
82views Hardware» more  ISCAS 2003»
15 years 12 months ago
On the feasibility of application of class E RF power amplifiers in UMTS
This paper investigates the feasibility of the application of class E RF power amplifiers in UMTS. A typical class E circuit has been designed and simulated, in conjunction with ...
Dusan M. Milosevic, Johan van der Tang, Arthur H. ...