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JRTIP
2008
249views more  JRTIP 2008»
15 years 6 months ago
Model-based mapping of reconfigurable image registration on FPGA platforms
Abstract Image registration is a computationally intensive application in the medical imaging domain that places stringent requirements on performance and memory management efficie...
Mainak Sen, Yashwanth Hemaraj, William Plishker, R...
CODES
2006
IEEE
15 years 10 months ago
Automatic phase detection for stochastic on-chip traffic generation
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
Antoine Scherrer, Antoine Fraboulet, Tanguy Risset
DATE
2008
IEEE
119views Hardware» more  DATE 2008»
16 years 1 months ago
Guiding Circuit Level Fault-Tolerance Design with Statistical Methods
In the last decade, the focus of fault-tolerance methods has tended towards circuit level modifications, such as transistor resizing, and away from expensive system level redunda...
Drew C. Ness, David J. Lilja
ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
15 years 11 months ago
FSM decomposition by direct circuit manipulation applied to low power design
Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
José C. Monteiro, Arlindo L. Oliveira
MOBICOM
2004
ACM
16 years 15 hour ago
Reducing MAC layer handoff latency in IEEE 802.11 wireless LANs
With the growth of IEEE 802.11-based wireless LANs, VoIP and similar applications are now commonly used over wireless networks. Mobile station performs a handoff whenever it move...
Sangho Shin, Andrea G. Forte, Anshuman Singh Rawat...