3249 search results - page 236 / 650 » C Based Hardware Design for Wireless Applications |
129
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ISCAS
2006
IEEE
16 years 18 days ago
2006
IEEE
In this paper, we propose a cost-effective reconfigurable accelerator for the platform-based system-on-a-chip (SoC) design. Based on the proposed design methodology, the reconfigu...
182
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TVLSI
2008
15 years 6 months ago
2008
To satisfy the advanced forward-error-correction (FEC) standards, in which the Convolutional code and Turbo code may co-exit, a prototype design of a unified Convolutional/Turbo de...
133
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FCCM
1999
IEEE
15 years 11 months ago
1999
IEEE
This paper presents a method, called multiple constant multiplier trees MCMTs, for producing optimized recon gurable hardware implementations of vector products. An algorithm for ...
184
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CLUSTER
2001
IEEE
15 years 10 months ago
2001
IEEE
The Virtual Interface Architecture (VIA) is an industry standard user-level communication architecture for system area networks. The VIA provides a protected, directlyaccessible i...
182
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DAC
2007
ACM
15 years 10 months ago
2007
ACM
SoC based system developments commonly employ ESL design ogies and utilize multiple levels of abstract models to provide feasibility study models for architects and development pl...