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FDL
2003
IEEE
16 years 1 hour ago
Design and Power Analysis in SysteC of an I2C Bus Driver
The paper presents a methodology to integrate information on power consumption in a high level functional description of a System-on-chip. The power dissipated during the executio...
Marco Caldari, Massimo Conti, Paolo Crippa, Simone...
AIPS
1996
15 years 8 months ago
Static and Completion Analysis for Planning Knowledge Base Development and Verification
A key obstacle hampering fielding of AI planning applications is the considerable expense of developing, verifying, updating, and maintaining the planning knowledge base (KB). Pla...
Steve A. Chien
ISCAPDCS
2003
15 years 8 months ago
Performance Monitoring of N-tier Client/Server Systems
Despite the widespread deployment of client/server technology, there seem to be no tools currently available that are adequate for analyzing and tuning the performance of client/s...
Christoph Steigner, Jürgen Wilke
156
Voted
RTSS
2002
IEEE
15 years 11 months ago
End-to-end Fairness Analysis of Fair Queuing Networks
In this paper, we present the first end-to-end fairness analysis of a network of fair servers. We argue that it is difficult to extend existing single-node fairness analysis to ...
Jasleen Kaur, Harrick M. Vin
ISOLA
2010
Springer
15 years 5 months ago
Worst-Case Analysis of Heap Allocations
In object oriented languages, dynamic memory allocation is a fundamental concept. When using such a language in hard real-time systems, it becomes important to bound both the worst...
Wolfgang Puffitsch, Benedikt Huber, Martin Schoebe...