1343 search results - page 140 / 269 » Bounded-lifetime integrated circuits |
149
click to vote
ICCD
2001
IEEE
16 years 3 months ago
2001
IEEE
CMOS Phase-locked loops (PLL) are ubiquitous in RF and mixed-signal integrated circuits. PLLs are very sensitive to noise fluctuations on the power and ground rails. In this paper...
161
click to vote
ICCAD
2008
IEEE
16 years 3 months ago
2008
IEEE
Large test data volume and high test power are two of the major concerns for the industry when testing large integrated circuits. With given test cubes in scan-based testing, the ...
162
click to vote
DATE
2008
IEEE
16 years 28 days ago
2008
IEEE
—Latch based circuits are widely adopted in high performance circuits. But there is a lack of accurate latch models for doing timing analysis. In this paper, we propose a new lat...
160
click to vote
ISCAS
2008
IEEE
16 years 27 days ago
2008
IEEE
—An energy detector designed in a 0.18μm CMOS technology and intended for a non-coherent impulse-radio UWB receiver is presented in this paper. The proposed circuit exploits the...
151
click to vote
ISVLSI
2007
IEEE
16 years 23 days ago
2007
IEEE
Formal verification has become an important step in circuit and system design. A prominent technique is Bounded Model Checking (BMC) which is widely used in industry. In BMC it i...