Sciweavers

1343 search results - page 137 / 269
» Bounded-lifetime integrated circuits
Sort
View
DATE
2002
IEEE
95views Hardware» more  DATE 2002»
15 years 11 months ago
Macromodeling of Digital I/O Ports for System EMC Assessment
This paper addresses the development of accurate and efficient behavioral models of digital integrated circuit input and output ports for EMC and signal integrity simulations. A ...
Igor S. Stievano, Flavio G. Canavero, Ivan A. Maio...
ISCAS
2006
IEEE
120views Hardware» more  ISCAS 2006»
16 years 15 days ago
Architecture of a VLSI cellular processor array for synchronous/asynchronous image processing
— This paper describes a new architecture for a cellular processor array integrated circuit, which operates in both discreteand continuous-time domains. Asynchronous propagation ...
Alexey Lopich, Piotr Dudek
GLVLSI
2010
IEEE
234views VLSI» more  GLVLSI 2010»
15 years 11 months ago
On-chip point-of-load voltage regulator for distributed power supplies
An ultra-low area, current efficient voltage regulator appropriate for distributed point-of-load voltage regulation in high performance integrated circuits (ICs) is described in t...
Selcuk Kose, Eby G. Friedman
DAC
2004
ACM
16 years 7 months ago
A frequency relaxation approach for analog/RF system-level simulation
The increasing complexity of today's mixed-signal integrated circuits necessitates both top-down and bottom-up system-level verification. Time-domain state-space modeling and...
Xin Li, Yang Xu, Peng Li, Padmini Gopalakrishnan, ...
ICCAD
2007
IEEE
128views Hardware» more  ICCAD 2007»
16 years 3 months ago
Module assignment for pin-limited designs under the stacked-Vdd paradigm
Abstract— This paper addresses the module assignment problem in pinlimited designs under the stacked-Vdd circuit paradigm. A partition-based algorithm is presented for efficient...
Yong Zhan, Tianpei Zhang, Sachin S. Sapatnekar