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» Bounded-lifetime integrated circuits
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IJCNN
2006
IEEE
16 years 15 days ago
In Situ Training of CMOL CrossNets
—— Hybrid semiconductor/nanodevice (“CMOL”) technology may allow the implementation of digital and mixed-signal integrated circuits, including artificial neural networks (...
Jung Hoon Lee, Konstantin Likharev
ISLPED
2005
ACM
110views Hardware» more  ISLPED 2005»
16 years 1 days ago
Complexity reduction in an nRERL microprocessor
We describe an adiabatic microprocessor implemented with a reversible logic, nRERL [1]. We employed an 8-phase clocked power instead of 6-phase one to reduce the number of buffers...
Seokkee Kim, Soo-Ik Chae
DATE
2010
IEEE
168views Hardware» more  DATE 2010»
15 years 11 months ago
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
Luca Sterpone, Niccolò Battezzati
ICCD
2000
IEEE
120views Hardware» more  ICCD 2000»
15 years 11 months ago
Equivalence Checking Combining a Structural SAT-Solver, BDDs, and Simulation
This paper presents a verification technique for functional comparison of large combinational circuits using a novel combination of known approaches. The idea is based on a tight...
Viresh Paruthi, Andreas Kuehlmann
ASAP
2008
IEEE
167views Hardware» more  ASAP 2008»
16 years 29 days ago
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
David Dickin, Lesley Shannon