Sciweavers

6404 search results - page 982 / 1281
» Blocks
Sort
View
MICRO
1998
IEEE
128views Hardware» more  MICRO 1998»
15 years 11 months ago
Putting the Fill Unit to Work: Dynamic Optimizations for Trace Cache Microprocessors
The fill unit is the structure which collects blocks of instructions and combines them into multi-block segments for storage in a trace cache. In this paper, we expand the role of...
Daniel H. Friendly, Sanjay J. Patel, Yale N. Patt
MICRO
1998
IEEE
139views Hardware» more  MICRO 1998»
15 years 11 months ago
Better Global Scheduling Using Path Profiles
Path profiles record the frequencies of execution paths through a program. Until now, the best global instruction schedulers have relied upon profile-gathered frequencies of condi...
Cliff Young, Michael D. Smith
VISUALIZATION
1998
IEEE
15 years 11 months ago
Smooth view-dependent level-of-detail control and its application to terrain rendering
The key to real-time rendering of large-scale surfaces is to locally adapt surface geometric complexity to changing view parameters. Several schemes have been developed to address...
Hugues Hoppe
ASPLOS
1998
ACM
15 years 11 months ago
Cache-Conscious Data Placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Brad Calder, Chandra Krintz, Simmi John, Todd M. A...
PADS
1998
ACM
15 years 11 months ago
A Nonblocking Algorithm for the Distributed Simulation of FCFS Queueing Networks with Irreducible Markovian Routing
In this paper we consider the distributed simulation of queueing networks of FCFS servers with infinite buffers, and irreducible Markovian routing. We first show that for either t...
Manish Gupta 0007, Anurag Kumar