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ISCA
2000
IEEE
134views Hardware» more  ISCA 2000»
15 years 11 months ago
Architectural support for scalable speculative parallelization in shared-memory multiprocessors
Speculative parallelization aggressively executes in parallel codes that cannot be fully parallelized by the compiler. Past proposals of hardware schemes have mostly focused on si...
Marcelo H. Cintra, José F. Martínez,...
ITCC
2000
IEEE
15 years 11 months ago
A Unified Derivation of Operational Matrices for Integration in Systems Analysis
Using the operational matrix of an orthogonal function to perform integration for solving, identifying and optimizing a linear dynamic system has several advantages: (1) the metho...
Jiunn-lin Wu, Chin-hsing Chen, Chih-fan Chen
RTCSA
2000
IEEE
15 years 11 months ago
Optimal scheduling of imprecise computation tasks in the presence of multiple faults
With the advance of applications such as multimedia, imagelspeech processing and real-time AI, real-time computing models allowing to express the “timeliness versus precision”...
Hakan Aydin, Rami G. Melhem, Daniel Mossé
VLSID
2000
IEEE
94views VLSI» more  VLSID 2000»
15 years 11 months ago
A Genetic Algorithm for the Synthesis of Structured Data Paths
The technique presented here achieves simultaneous optimization of schedule time and data path component cost within a structured data path architecture, using a genetic algorithm...
Chittaranjan A. Mandal, R. M. Zimmer
ASPDAC
2000
ACM
104views Hardware» more  ASPDAC 2000»
15 years 11 months ago
Design of digital neural cell scheduler for intelligent IB-ATM switch
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
J.-K. Lee, Seung-Min Lee, Mike Myung-Ok Lee, D.-W....