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FPL
2000
Springer
119views Hardware» more  FPL 2000»
15 years 10 months ago
A Self-Reconfigurable Gate Array Architecture
Abstract. This paper presents an innovative architecture for a reconfigurable device that allows single cycle context switching and single cycle random access to the unified on-chi...
Reetinder P. S. Sidhu, Sameer Wadhwa, Alessandro M...
ICSE
2000
IEEE-ACM
15 years 10 months ago
Integrating UML diagrams for production control systems
This paper proposes to use SDL block diagrams, UML class diagrams, and UML behavior diagrams like collaboration diagrams, activity diagrams, and statecharts as a visual programmin...
Hans J. Köhler, Ulrich Nickel, Jörg Nier...
DAC
1997
ACM
15 years 10 months ago
CELLERITY: A Fully Automatic Layout Synthesis System for Standard Cell Libraries
This paper describes a fully automatic standard-cell layout synthesis system, CELLERITY. The system is flexible in supporting a wide variety of process technologies and a range of...
Mohankumar Guruswamy, Robert L. Maziasz, Daniel Du...
ISCA
1995
IEEE
147views Hardware» more  ISCA 1995»
15 years 10 months ago
Dynamic Self-Invalidation: Reducing Coherence Overhead in Shared-Memory Multiprocessors
This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages...
Alvin R. Lebeck, David A. Wood
CONCUR
1991
Springer
15 years 10 months ago
A Method for the Development of Totally Correct Shared-State Parallel Programs
Abstract. A syntax-directed formal system for the development of totally correct programs with respect to an (unfair) shared-state parallel programming language is proposed. The pr...
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