Sciweavers

6404 search results - page 484 / 1281
» Blocks
Sort
View
DATE
2006
IEEE
195views Hardware» more  DATE 2006»
16 years 27 days ago
Application specific instruction processor based implementation of a GNSS receiver on an FPGA
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
Götz Kappen, Tobias G. Noll
DATE
2006
IEEE
102views Hardware» more  DATE 2006»
16 years 27 days ago
A systematic IP and bus subsystem modeling for platform-based system design
The topic on platform-based system modeling has received a great deal of attention today. One of the important tasks that significantly affect the effectiveness and efficiency of ...
Junhyung Um, Woo-Cheol Kwon, Sungpack Hong, Young-...
DFT
2006
IEEE
143views VLSI» more  DFT 2006»
16 years 27 days ago
Defect Tolerant and Energy Economized DSP Plane of a 3-D Heterogeneous SoC
This paper1 discusses a defect tolerant and energy economized computing array for the DSP plane of a 3-D Heterogeneous System on a Chip. We present the J-platform, which employs c...
Vijay K. Jain, Glenn H. Chapman
DSN
2006
IEEE
16 years 27 days ago
Dependability Analysis of Virtual Memory Systems
Recent research has shown that even modern hard disks have complex failure modes that do not conform to “failstop” operation. Disks exhibit partial failures like block access ...
Lakshmi N. Bairavasundaram, Andrea C. Arpaci-Dusse...
ECBS
2006
IEEE
211views Hardware» more  ECBS 2006»
16 years 27 days ago
Modified Pseudo LRU Replacement Algorithm
Although the LRU replacement algorithm has been widely used in cache memory management, it is wellknown for its inability to be easily implemented in hardware. Most of primary cac...
Hassan Ghasemzadeh, Sepideh Sepideh Mazrouee, Moha...