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DAC
2010
ACM
15 years 7 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
BIRTHDAY
2010
Springer
15 years 7 months ago
From the Internet of Computers to the Internet of Things
Abstract. This paper1 discusses the vision, the challenges, possible usage scenarios and technological building blocks of the "Internet of Things". In particular, we cons...
Friedemann Mattern, Christian Floerkemeier
DSD
2010
IEEE
126views Hardware» more  DSD 2010»
15 years 7 months ago
Low Power FPGA Implementations of 256-bit Luffa Hash Function
Low power techniques in a FPGA implementation of the hash function called Luffa are presented in this paper. This hash function is under consideration for adoption as standard. Tw...
Paris Kitsos, Nicolas Sklavos, Athanassios N. Skod...
CORR
2008
Springer
153views Education» more  CORR 2008»
15 years 6 months ago
A Truthful Mechanism for Offline Ad Slot Scheduling
We consider the Offline Ad Slot Scheduling problem, where advertisers must be scheduled to sponsored search slots during a given period of time. Advertisers specify a budget constr...
Jon Feldman, S. Muthukrishnan, Evdokia Nikolova, M...
145
Voted
DAM
2008
89views more  DAM 2008»
15 years 6 months ago
T-shift synchronization codes
In this paper we give a construction of T-shift synchronization codes, i.e. block codes capable of correcting synchronization shifts of length at most T in either direction (left ...
Rudolf Ahlswede, Bernhard Balkenhol, Christian Dep...