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DCC
2006
IEEE
16 years 6 months ago
A Flaw in the Use of Minimal Defining Sets for Secret Sharing Schemes
It is shown that in some cases it is possible to reconstruct a block design D uniquely from incomplete knowledge of a minimal defining set for D. This surprising result has implic...
Mike J. Grannell, Terry S. Griggs, Anne Penfold St...
ICCAD
2006
IEEE
115views Hardware» more  ICCAD 2006»
16 years 3 months ago
Thermal characterization and optimization in platform FPGAs
Increasing power densities in Field Programmable Gate Arrays (FPGAs) have made them susceptible to thermal problems. The advent of platform FPGAs has further exacerbated the probl...
Priya Sundararajan, Aman Gayasen, Narayanan Vijayk...
DAC
2009
ACM
16 years 1 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
DATE
2009
IEEE
189views Hardware» more  DATE 2009»
16 years 1 months ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
ISSTA
2009
ACM
16 years 1 months ago
Identifying bug signatures using discriminative graph mining
Bug localization has attracted a lot of attention recently. Most existing methods focus on pinpointing a single statement or function call which is very likely to contain bugs. Al...
Hong Cheng, David Lo, Yang Zhou, Xiaoyin Wang, Xif...