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ASPDAC
2006
ACM
95views Hardware» more  ASPDAC 2006»
16 years 11 days ago
Simultaneous block and I/O buffer floorplanning for flip-chip design
Chih-Yang Peng, Wen-Chang Chao, Yao-Wen Chang, Jyh...
CIMCA
2005
IEEE
16 years 14 hour ago
An Accelerating Learning Algorithm for Block-Diagonal Recurrent Neural Networks
An efficient training method for block-diagonal recurrent neural networks is proposed. The method modifies the RPROP algorithm, originally developed for static models, in order to...
Paris A. Mastorocostas, Dimitris N. Varsamis, Cons...
FPT
2005
IEEE
163views Hardware» more  FPT 2005»
16 years 7 hour ago
Designing an FPGA SoC Using a Standardized IP Block Interface
Designing Systems on-Chip is becoming increasingly popular as die sizes increase and technology sizes decrease. The complexity of integrating different types of Processing Element...
Lesley Shannon, Blair Fort, Samir Parikh, Arun Pat...
HOTI
2005
IEEE
16 years 5 hour ago
High-Speed and Low-Power Network Search Engine Using Adaptive Block-Selection Scheme
A partitioned TCAM-based search engine is presented that increases packet forwarding rate multiple times over traditional TCAMs. The model works for IPv4 and IPv6 packet forwardin...
Mohammad J. Akhbarizadeh, Mehrdad Nourani, Rina Pa...