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EPS
1998
Springer
15 years 10 months ago
Evolutionary Algorithms for Vertex Cover
This paper reports work investigating various evolutionary approaches to vertex cover (VC), a well-known NP-Hard optimization problem. Central to each of the algorithms is a novel ...
Isaac K. Evans
EURODAC
1994
IEEE
148views VHDL» more  EURODAC 1994»
15 years 10 months ago
BiTeS: a BDD based test pattern generator for strong robust path delay faults
This paper presents an algorithm for generation of test patterns for strong robust path delay faults, i.e. tests that propagate the fault along a single path and additionally are ...
Rolf Drechsler
ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
COMPSYSTECH
2007
15 years 10 months ago
A refinement model with information granulation focused on difficult to distinguish cases
: The paper proposes a different approach to data modeling. Analogous to the rejection method, where the misclassifications are removed and manually evaluated, we focus here on dif...
Plamena Andreeva, Plamen Andreev, Maya Dimitrova, ...
DIS
2006
Springer
15 years 10 months ago
Symmetric Item Set Mining Based on Zero-Suppressed BDDs
In this paper, we propose a method for discovering hidden information from large-scale item set data based on the symmetry of items. Symmetry is a fundamental concept in the theory...
Shin-ichi Minato