Sciweavers

1550 search results - page 183 / 310
» Benchmarking for Graph Transformation
Sort
View
ICMCS
2007
IEEE
131views Multimedia» more  ICMCS 2007»
16 years 20 days ago
3D Model Retrieval Based on Depth Line Descriptor
In this paper, we propose a novel 2D/3D approach for 3D model matching and retrieving. Each model is represented by a set of depth lines which will be afterward transformed into s...
Mohamed Chaouch, Anne Verroust-Blondet
IPCCC
2007
IEEE
16 years 20 days ago
Application Insight Through Performance Modeling
Tuning the performance of applications requires understanding the interactions between code and target architecture. This paper describes a performance modeling approach that not ...
Gabriel Marin, John M. Mellor-Crummey
DDECS
2006
IEEE
79views Hardware» more  DDECS 2006»
16 years 12 days ago
Multiple-Vector Column-Matching BIST Design Method
- Extension of a BIST design algorithm is proposed in this paper. The method is based on a synthesis of a combinational block - the decoder, transforming pseudo-random code words i...
Petr Fiser, Hana Kubatova
IISWC
2006
IEEE
16 years 11 days ago
Load Instruction Characterization and Acceleration of the BioPerf Programs
The load instructions of some of the bioinformatics applications in the BioPerf suite possess interesting characteristics: only a few static loads cover almost the entire dynamic ...
Paruj Ratanaworabhan, Martin Burtscher
FPGA
2005
ACM
158views FPGA» more  FPGA 2005»
15 years 12 months ago
Automated synthesis for asynchronous FPGAs
We present an automatic logic synthesis method targeted for highperformance asynchronous FPGA (AFPGA) architectures. Our method transforms sequential programs as well as high-leve...
Song Peng, David Fang, John Teifel, Rajit Manohar