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ISCAS
2005
IEEE
126views Hardware» more  ISCAS 2005»
16 years 13 days ago
A distributed FIFO scheme for on chip communication
— Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because of disturbances that result from parasiti...
Ray Robert Rydberg III, Jabulani Nyathi, Jos&eacut...
ISCAS
2005
IEEE
119views Hardware» more  ISCAS 2005»
16 years 13 days ago
Analysis of power consumption in VLSI global interconnects
Abstract— The analysis of effects induced by interconnects become increasingly important as the scale of process technologies steadily shrinks. While most analyses focus on the t...
Youngsoo Shin, Hyung-Ock Kim
ISQED
2005
IEEE
87views Hardware» more  ISQED 2005»
16 years 13 days ago
A Practical Transistor-Level Dual Threshold Voltage Assignment Methodology
Leakage power has become one of the most critical design concerns for the system-level chip designer. Multi-threshold techniques have been used to reduce runtime leakage power wit...
Puneet Gupta, Andrew B. Kahng, Puneet Sharma
ISVLSI
2005
IEEE
126views VLSI» more  ISVLSI 2005»
16 years 13 days ago
Adaptive Power Management in Software Radios Using Resolution Adaptive Analog to Digital Converters
The popularity of Software Radios is increasing, as they have become one of the important emerging technologies in mobile communications. One of the major challenges during develo...
Daniel Hostetler, Yuan Xie
LCN
2005
IEEE
16 years 12 days ago
On Reorder Density and its Application to Characterization of Packet Reordering
A formal approach for characterizing, evaluating and modeling packet reordering is presented. Reordering is, a phenomenon that is likely to become increasingly common on Internet,...
Nischal M. Piratla, Anura P. Jayasumana, Tarun Ban...