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EDCC
2008
Springer
15 years 8 months ago
A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR
The ongoing technological advances in the semiconductor industry make Multi-Processor System-on-a-Chips (MPSoCs) more attractive, because uniprocessor solutions do not scale satis...
Roman Obermaisser, Hubert Kraut, Christian El Sall...
ICCAD
2008
IEEE
106views Hardware» more  ICCAD 2008»
16 years 3 months ago
Process variability-aware transient fault modeling and analysis
– Due to reduction in device feature size and supply voltage, the sensitivity of digital systems to transient faults is increasing dramatically. As technology scales further, the...
Natasa Miskov-Zivanov, Kai-Chiang Wu, Diana Marcul...
SOSP
2005
ACM
16 years 3 months ago
Fault-scalable Byzantine fault-tolerant services
A fault-scalable service can be configured to tolerate increasing numbers of faults without significant decreases in performance. The Query/Update (Q/U) protocol is a new tool t...
Michael Abd-El-Malek, Gregory R. Ganger, Garth R. ...
MICRO
2009
IEEE
120views Hardware» more  MICRO 2009»
16 years 1 months ago
Reducing peak power with a table-driven adaptive processor core
The increasing power dissipation of current processors and processor cores constrains design options, increases packaging and cooling costs, increases power delivery costs, and de...
Vasileios Kontorinis, Amirali Shayan, Dean M. Tull...
AISS
2010
119views more  AISS 2010»
15 years 3 months ago
Distributed Cipher Services Using Object Activation
As the World Wide Web grows rapidly on a daily basis, the number of new computer attacks is also growing at a matching rate. It is increasing by development of information and com...
JinKyoung Heo