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DATE
2002
IEEE
124views Hardware» more  DATE 2002»
15 years 11 months ago
Crosstalk Alleviation for Dynamic PLAs
—The dynamic programmable logic array (PLA) style has become popular in designing high-performance microprocessors because of its high speed and predictable routing delay. Howeve...
Tzyy-Kuen Tien, Tong-Kai Tsai, Shih-Chieh Chang
ISCA
2002
IEEE
91views Hardware» more  ISCA 2002»
15 years 11 months ago
Slack: Maximizing Performance Under Technological Constraints
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
Brian A. Fields, Rastislav Bodík, Mark D. H...
ISESE
2002
IEEE
15 years 11 months ago
Elimination of Crucial Faults by a New Selective Testing Method
Recent software systems contain a lot of functions to provide various services. According to this tendency, software testing becomes more difficult than before and cost of testing...
Masayuki Hirayama, Tetsuya Yamamoto, Jiro Okayasu,...
MICRO
2002
IEEE
171views Hardware» more  MICRO 2002»
15 years 11 months ago
Orion: a power-performance simulator for interconnection networks
With the prevalence of server blades and systems-ona-chip (SoCs), interconnection networks are becoming an important part of the microprocessor landscape. However, there is limite...
Hangsheng Wang, Xinping Zhu, Li-Shiuan Peh, Sharad...
PLDI
2009
ACM
15 years 11 months ago
A study of memory management for web-based applications on multicore processors
More and more server workloads are becoming Web-based. In these Web-based workloads, most of the memory objects are used only during one transaction. We study the effect of the me...
Hiroshi Inoue, Hideaki Komatsu, Toshio Nakatani