4072 search results - page 312 / 815 » Becoming Increasingly Reactive |
173
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HPCA
2006
IEEE
16 years 7 months ago
2006
IEEE
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
154
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ISCA
2009
IEEE
16 years 1 months ago
2009
IEEE
This paper presents a novel technique, Memory Mapped ECC, which reduces the cost of providing error correction for SRAM caches. It is important to limit such overheads as processo...
173
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IISWC
2008
IEEE
16 years 1 months ago
2008
IEEE
Abstract— The Intel Threading Building Blocks (TBB) runtime library [1] is a popular C++ parallelization environment [2][3] that offers a set of methods and templates for creatin...
159
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NCA
2007
IEEE
16 years 28 days ago
2007
IEEE
As disk storage density increases and data availability requirements become ever more demanding, data replication is increasingly an indispensable feature of enterprise-class stor...
194
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IEEEPACT
2006
IEEE
16 years 21 days ago
2006
IEEE
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...