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HIPC
2004
Springer
15 years 11 months ago
Parallel Performance of Hierarchical Multipole Algorithms for Inductance Extraction
Parasitic extraction techniques are used to estimate signal delay in VLSI chips. Inductance extraction is a critical component of the parasitic extraction process in which on-chip ...
Hemant Mahawar, Vivek Sarin, Ananth Grama
ICCAD
1997
IEEE
90views Hardware» more  ICCAD 1997»
15 years 10 months ago
A hierarchical decomposition methodology for multistage clock circuits
† This paper describes a novel methodology to automate the design of the interconnect distribution for multistage clock circuits. We introduce two key ideas. First, a hierarchica...
Gary Ellis, Lawrence T. Pileggi, Rob A. Rutenbar
PAMI
1998
128views more  PAMI 1998»
15 years 6 months ago
A Hierarchical Latent Variable Model for Data Visualization
—Visualization has proven to be a powerful and widely-applicable tool for the analysis and interpretation of multivariate data. Most visualization algorithms aim to find a projec...
Christopher M. Bishop, Michael E. Tipping
NAR
2006
156views more  NAR 2006»
15 years 6 months ago
VOMBAT: prediction of transcription factor binding sites using variable order Bayesian trees
Variable order Markov models and variable order Bayesian trees have been proposed for the recognition of transcription factor binding sites, and it could be demonstrated that they...
Jan Grau, Irad E. Ben-Gal, Stefan Posch, Ivo Gross...
CVPR
2007
IEEE
16 years 8 months ago
Adaptive Patch Features for Object Class Recognition with Learned Hierarchical Models
We present a hierarchical generative model for object recognition that is constructed by weakly-supervised learning. A key component is a novel, adaptive patch feature whose width...
Fabien Scalzo, Justus H. Piater