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RSP
1999
IEEE
160views Control Systems» more  RSP 1999»
15 years 10 months ago
Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping
SDL is currently gaining interest as a system level specification language for HW/SW codesign. Automated synthesis of SDL in hardware so far had problems with its efficiency. The ...
Oliver Bringmann, Wolfgang Rosenstiel, Annette Mut...
SCCC
1999
IEEE
15 years 10 months ago
MetaFT-A Reflective Approach to Implement Replication Techniques in CORBA
A model was introduced in [Fraga97] for integrating replication techniques in heterogeneous systems. The model adopts a reflective structure based on the meta-object approach [10]...
Lau Cheuk Lung, Joni da Silva Fraga, Carlos Mazier...
SP
1999
IEEE
125views Security Privacy» more  SP 1999»
15 years 10 months ago
A Multi-Threading Architecture for Multilevel Secure Transaction Processing
A TCB and security kernel architecture for supporting multi-threaded, queue-driven transaction processing applications in a multilevel secure environment is presented. Our design ...
Haruna R. Isa, William R. Shockley, Cynthia E. Irv...
VLSID
1999
IEEE
139views VLSI» more  VLSID 1999»
15 years 10 months ago
Processor Modeling for Hardware Software Codesign
In hardware - software codesign paradigm often a performance estimation of the system is needed for hardware - software partitioning. The tremendous growth of application specific...
V. Rajesh, Rajat Moona
ICS
1999
Tsinghua U.
15 years 10 months ago
Reorganizing global schedules for register allocation
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
Gang Chen, Michael D. Smith