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» Batch codes and their applications
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PLDI
2009
ACM
16 years 1 months ago
Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
Mojtaba Mehrara, Jeff Hao, Po-Chun Hsu, Scott A. M...
CODES
2006
IEEE
16 years 22 days ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt
CODES
2008
IEEE
15 years 8 months ago
Power reduction via macroblock prioritization for power aware H.264 video applications
As the importance of multimedia applications in hand-held devices increases, the computational strain and corresponding demand for energy in such devices continues to grow. Portab...
Michael A. Baker, Viswesh Parameswaran, Karam S. C...
ISCAPDCS
2001
15 years 8 months ago
End-user Tools for Application Performance Analysis Using Hardware Counters
One purpose of the end-user tools described in this paper is to give users a graphical representation of performance information that has been gathered by instrumenting an applica...
Kevin S. London, Jack Dongarra, Shirley Moore, Phi...
TDSC
2010
119views more  TDSC 2010»
15 years 1 months ago
On the General Applicability of Instruction-Set Randomization
We describe Instruction-Set Randomization (ISR), a general approach for safeguarding systems against any type of code-injection attack. We apply Kerckhoffs' principle to creat...
Stephen W. Boyd, Gaurav S. Kc, Michael E. Locasto,...