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ISCA
2005
IEEE
128views Hardware» more  ISCA 2005»
16 years 9 days ago
An Evaluation Framework and Instruction Set Architecture for Ion-Trap Based Quantum Micro-Architectures
: The theoretical study of quantum computation has yielded efficient algorithms for some traditionally hard problems. Correspondingly, experimental work on the underlying physical...
Steven Balensiefer, Lucas Kreger-Stickles, Mark Os...
PLDI
2005
ACM
16 years 8 days ago
Programming by sketching for bit-streaming programs
This paper introduces the concept of programming with sketches, an approach for the rapid development of high-performance applications. This approach allows a programmer to write ...
Armando Solar-Lezama, Rodric M. Rabbah, Rastislav ...
PLDI
2010
ACM
15 years 11 months ago
Supporting speculative parallelization in the presence of dynamic data structures
The availability of multicore processors has led to significant interest in compiler techniques for speculative parallelization of sequential programs. Isolation of speculative s...
Chen Tian, Min Feng, Rajiv Gupta
CODES
2009
IEEE
15 years 11 months ago
Native MPSoC co-simulation environment for software performance estimation
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
Patrice Gerin, Mian Muhammad Hamayun, Fréd&...
ISCA
1995
IEEE
92views Hardware» more  ISCA 1995»
15 years 10 months ago
A Comparison of Full and Partial Predicated Execution Support for ILP Processors
One can e ectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential bene ts of predicated execution are hig...
Scott A. Mahlke, Richard E. Hank, James E. McCormi...