Sciweavers

3228 search results - page 179 / 646
» Basics of Compiler Design
Sort
View
OSDI
2002
ACM
16 years 7 months ago
Using Model Checking to Debug Device Firmware
Device firmware is a piece of concurrent software that achieves high performance at the cost of software complexity. They contain subtle race conditions that make them difficult t...
Sanjeev Kumar, Kai Li
CGO
2008
IEEE
16 years 1 months ago
Parallel-stage decoupled software pipelining
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...
Easwaran Raman, Guilherme Ottoni, Arun Raman, Matt...
ISSAC
2007
Springer
128views Mathematics» more  ISSAC 2007»
16 years 1 months ago
Productivity and performance using partitioned global address space languages
Partitioned Global Address Space (PGAS) languages combine the programming convenience of shared memory with the locality and performance control of message passing. One such langu...
Katherine A. Yelick, Dan Bonachea, Wei-Yu Chen, Ph...
LCTRTS
2005
Springer
16 years 11 days ago
Cache aware optimization of stream programs
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...
ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
16 years 9 days ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...